Synopsys Inc. announced on Wednesday immediate availability of its MIPI I3CSM controller IP to ease the integration of multiple sensors into applications such as mobile, automotive and the Internet of Things (IoT).
The Synopsys DesignWare MIPI I3C Controller IP incorporates in-band interrupts within the 2-wire interface to deliver low pin count. The IP is compliant with the MIPI Camera Control Interface (CCI), I2C and MIPI I3C specifications, allowing designers to scale and future-proof their sensor interface designs. In addition, the controller IP supports master and slave operating modes, enabling systems with several ICs to connect to sensors on a single I3C bus.
With the DesignWare MIPI I3C Controller IP, designers can integrate more sensors into a system while simplifying board design and reducing overall cost and power. Low-power management features such as clock gating enable energy-efficient sensors and SoC designs, while the configurable transaction and data buffering features enable performance versus cost tradeoffs for the target application.
The DesignWare MIPI I3C Controller IP with Synopsys’ silicon-proven DesignWare MIPI CSI-2 Controller, D-PHY, verification IP and IP Prototyping Kit enable designers to have a complete image sensor interface solution.
With MIPI I3CSM controller IP, uers get access to high-bandwidth over low-power 2-wire bus; support of Address Resolution Procedure (ARP); in-band interrupts that help keep a very low SoC pin count; separate command register and data buffers for ease of DMA transfers; supports of up to 255 write or read bytes with a single command; configurable and optional programmable buffer depths; built-in hardware Dynamic Address Allocation (DAA) support; Hot-Join capability; complete synthesizable RTLClock gating-ready design as well as DFT ready, and availability of hardware prototyping system.
The DesignWare MIPI I3C Controller IP supports data rates up to 26.7 Mbps, dynamic address allocation, multi-master operations and 32-bit ARM AMBA Advanced Peripheral Bus (APB) slave interface. The standards-based APB interface connects the IP to the rest of the SoC while the bus is connected to the register and Direct Memory Access (DMA) interfaces, enabling easy IP integration. The combination of the DesignWare MIPI I3C Controller IP with Synopsys’ silicon-proven DesignWare MIPI CSI-2SM Controller, D-PHYSM, verification IP and IP Prototyping Kits enables designers to have a complete image sensor interface solution.
“As an active member of the MIPI Alliance for more than 10 years, Synopsys continues to drive the development of key protocols such as I3C to help enable the ecosystem,” said Joel Huloux, chairman of the board of MIPI Alliance. “Synopsys offers designers a high-performance interface IP solution that they can leverage to future proof their legacy I2C devices and utilize the new I3C specification to quickly develop their unique products in mobile applications and beyond.”
“Designers are adding more sensors into systems to deliver sophisticated functionalities such as touch, motion, proximity and others,” said John Koeter, vice president of marketing for IP and prototyping at Synopsys. “The DesignWare MIPI I3C Controller IP provides a scalable interface solution that enables designers to efficiently integrate required sensor connectivity into their systems, while meeting challenging performance, power and cost constraints of their target application.”