Cadence Design Systems expanded on Monday support for the enhanced ARM DesignStart program, including the newly added ARM Cortex-M3 processor and the ARM CoreLink SDK-100 System Design Kit, which includes the fully verified CoreLink SSE-050 subsystem, enabling engineers to further accelerate the delivery of mixed-signal internet of things (IoT) designs.
The Cadence Hosted Design Solutions (HDS) design environment provides secure servers, storage, and EDA software accessible from anywhere in the world, incorporating Cadence mixed-signal solutions that have been optimized for use with Cortex-M series processors.
To simplify the customer experience, DesignStart customers can register to gain instant access to evaluate Cadence HDS with a set of mixed-signal solutions for a limited-time trial, with the ability to migrate to a commercial version. During the trial period, customers can experiment with the Cadence toolset via a self-paced tutorial for a sample mixed-signal IoT system-on-chip (SoC) design, incorporating subsystem design files for Cortex-M0 processors accessible under the DesignStart program.
In collaboration with ARM’s DesignStart program, Cadence offers a Hosted Design Solutions Enablement Program to accelerate your time-to-silicon with increased productivity, flexibility, and support. This joint program allows users to meet design requirements whether they are a start-up company or a large enterprise company seeking to exploit the volume cost benefits of an SoC.
ARM DesignStart provides low cost and easy access to ARM Cortex-M0 and Cortex-M3 IP for custom SoC design, while Cadence Hosted Design Solutions provides fast and easy access to secure customer private chambers, EDA software, servers, storage, IP, and services for rapid design start.
Customers who migrate to the commercial HDS environment gain access to the complete portfolio of Cadence mixed-signal design tools. Designers can benefit from on-demand access to required tools as Cadence HDS customers have flexible access to the tools they need, when they need them, through an expense-based on-demand model, and offers a proven fully scalable SoC design environment with security, low latency and redundancy.
Users avoid deployment delays and setup costs by using IT and CAD services integral to Cadence HDS, and get access to the necessary Cadence design and verification IP to help accelerate their SoC design and closure. Cadence HDS offers a proven characterization solution for ARM Artisan physical IP libraries and memories. To ease the SoC design process, customers have access to proprietary Cadence design and methodology services.
“With the elimination of upfront license fees for the ARM Cortex-M0 and Cortex-M3 processors and their subsystems, the enhanced ARM DesignStart program makes it easier for designers to utilize two of the world’s most popular processors and quickly reap the benefits of custom SoCs,” said John Ronco, vice president of marketing, Compute Products Group, ARM. “The combination of instant, free access to these proven, trusted processors, together with Cadence tools, via the ‘anywhere, anytime’ availability that Cadence HDS provides, is a key part of our strategy to make it easier than ever before for our partners to develop their custom SoCs.”
“This new Cadence HDS offering effectively lowers the barriers to entry for start-ups and other companies that are new to creating innovative IoT SoC designs,” said Craig Johnson, vice president, Cloud Solutions at Cadence. “Through our collaboration with ARM, our customers now have a simple path to access a variety of benefits provided by the ARM and Cadence SoC design enablement programs.”